TCR=0
RTC Time Compensation Register
TCR | Time Compensation Register 0 (0): Time prescaler register overflows every 32768 clock cycles. 1 (1): Time prescaler register overflows every 32767 clock cycles. 127 (1111111): Time prescaler register overflows every 32641 clock cycles. 128 (10000000): Time prescaler register overflows every 32896 clock cycles. 255 (11111111): Time prescaler register overflows every 32769 clock cycles. |
CIR | Compensation Interval Register |
TCV | Time Compensation Value |
CIC | Compensation Interval Counter |